1. Field of the Invention
The present invention relates, in general, to semiconductor packaging and, in particular, to structures and manufacturing methods for wirebonded semiconductor packages.
2. Description of the Related Art
Semiconductor package structures provide for semiconductor devices contained therein (e.g., an integrated circuit) to be electrically connected to an external system via input/output (I/O) terminals and protected from deleterious environmental factors. Wirebonding is a conventional method for making an electrical connection between a semiconductor device and a semiconductor package substrate.
In a conventional wirebonding method, a semiconductor device (also referred to as a xe2x80x9cdiexe2x80x9d) is adhered to a semiconductor package substrate using, for example, epoxy. Wirebonds, which are essentially short loops of metallic wire (e.g., aluminum wire or gold wire), are subsequently connected between the die and the semiconductor package substrate. Typically, the wirebonds and die are then covered with an encapsulant material (e.g., an epoxy molding compound).
FIGS. 1A and 1B are simplified cross-sectional and top view illustrations, respectively, depicting a conventional wirebonded semiconductor package structure 10. Wirebonded semiconductor package structure 10 includes a die 12 and a semiconductor package substrate 14. Wirebonded semiconductor package substrate 10 also includes a plurality of wirebonds 16 electrically connecting die 12 to semiconductor package substrate 14. In a conventional wirebonded semiconductor package structure, encapsulant material (not shown) covers wirebonds 16 and die 12.
State-of-the-art semiconductor devices are often designed to operate at high frequencies (e.g., at operating frequencies in the range of 10 MHz to greater than 10 GHz) and with a relatively large number of I/O terminals. At high operating frequencies, conventional wirebonded semiconductor package structures can exhibit undesirable electrical characteristics, such as high impedance, uncompensated conductance and false signals originating from ground bounce. Furthermore, as the number of I/O terminals increases, conventional wirebonded semiconductor package structures are susceptible to cross-talk (i.e., electrical noise coupled between wirebonds) due to inadequate electromagnetic shielding between neighboring wirebonds.
Several approaches have been taken to eliminate or reduce the aforementioned undesirable electrical characteristics. For example, coplanar waveguide structures, stripline structures, the use of conductors that encase a semiconductor package structure, and multiple grounded wirebonds have been employed to control impedance, improve electromagnetic shielding and create a compensating parallel inductance. In addition, flip chip and chip scale semiconductor packages have been employed for semiconductor devices that operate at high frequencies and/or require a large number of I/O terminals. Each of these approaches, however, is either costly, incompatible with a large number of I/O terminals and/or less understood and validated with respect to reliability than a conventional wirebonded semiconductor package structure.
Still needed in the field, therefore, are a wirebonded semiconductor package structure and a method for manufacturing the same that provides for high frequency operation and a relatively large number of I/O terminals. Such a wirebonded semiconductor package structure should provide for controlled low impedance, compensated inductance, electromagnetic shielding against cross-talk and prevention of false signals from ground bounce.
The present invention provides a wirebonded semiconductor package structure that enables high frequency operation, a large number of I/O terminals, controlled low impedance, compensated inductance, electromagnetic shielding against cross-talk and prevention of false signals from ground bounce. Also provided by the present invention is an inexpensive method for manufacturing such a wirebonded semiconductor package structure.
A wirebonded semiconductor package structure according to one exemplary embodiment of the present invention includes a semiconductor device, a semiconductor package substrate and a wirebond(s) electrically connecting the semiconductor device to the semiconductor package substrate. The wirebonded semiconductor package structure also includes a first insulating encapsulant layer at least partially encapsulating the wirebond(s) and a conductor layer (e.g., a patterned gold conductor layer) disposed on the first insulating encapsulant layer and electrically connected to the semiconductor package substrate. The conductor layer can be electrically connected to, for example, a ground connection of the semiconductor package substrate.
Having an electrically connected conductor layer (or a patterned conductor layer) near the wirebond(s) provides several benefits in wirebonded semiconductor package structures according to the present invention. First, since bondwire impedance is reduced when a bondwire is close to an electrical reference plane (e.g., a conductor layer of patterned conductor layer electrically connected to ground), it reduces the impedance of the wirebond(s) of the wirebonded semiconductor package structure. Second, the inductance of the wirebond is also compensated, and therefore reduced, by the presence of the electrically connected conductor layer. The lowering of impedance and compensation of inductance enables the semiconductor device to operate at high frequencies (e.g., frequencies in the range of 10 MHz to 10 GHz) without significant signal attenuation. Third, the presence of the conductor layer provides electromagnetic shielding for the wirebond(s), thus reducing cross-talk and enabling the use of a large number of I/O terminals. Fourth, the conductor layer diminishes the possibility of ground bounce by effectively reducing the ground impedance of the wirebonded semiconductor package structure.
A method for manufacturing a wirebonded semiconductor package structure according to one exemplary embodiment of the present invention includes wirebonding a die to a semiconductor package substrate to form a semiconductor package structure. The semiconductor package structure thus formed includes the die, the semiconductor package substrate and a wirebond(s) electrically connecting the die to the semiconductor package substrate. Next, a first insulating encapsulant layer is applied to the semiconductor package structure at least partially encapsulating the wirebond(s). A conductor layer is subsequently applied on the first insulating encapsulant layer such that the conductor layer is electrically connected to the semiconductor package substrate, thereby creating a wirebonded semiconductor package structure. Thereafter, if desired to further improve the electrical characteristics of the wirebonded semiconductor package structure, the conductor layer can be patterned to form a patterned conductor layer that is electrically connected to the semiconductor package substrate. Methods according to the present invention utilize conventional processing techniques and are, therefore, inexpensive.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description that sets forth illustrative embodiments, in which the principles of the invention are utilized, and the accompanying drawings.